Linux驱动开发十九.SPI驱动开发

  1 /**
  2  * struct spi_master - interface to SPI master controller
  3  * @dev: device interface to this driver
  4  * @list: link with the global spi_master list
  5  * @bus_num: board-specific (and often SOC-specific) identifier for a
  6  *    given SPI controller.
  7  * @num_chipselect: chipselects are used to distinguish individual
  8  *    SPI slaves, and are numbered from zero to num_chipselects.
  9  *    each slave has a chipselect signal, but it's common that not
 10  *    every chipselect is connected to a slave.
 11  * @dma_alignment: SPI controller constraint on DMA buffers alignment.
 12  * @mode_bits: flags understood by this controller driver
 13  * @bits_per_word_mask: A mask indicating which values of bits_per_word are
 14  *    supported by the driver. Bit n indicates that a bits_per_word n+1 is
 15  *    supported. If set, the SPI core will reject any transfer with an
 16  *    unsupported bits_per_word. If not set, this value is simply ignored,
 17  *    and it's up to the individual driver to perform any validation.
 18  * @min_speed_hz: Lowest supported transfer speed
 19  * @max_speed_hz: Highest supported transfer speed
 20  * @flags: other constraints relevant to this driver
 21  * @bus_lock_spinlock: spinlock for SPI bus locking
 22  * @bus_lock_mutex: mutex for SPI bus locking
 23  * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
 24  * @setup: updates the device mode and clocking records used by a
 25  *    device's SPI controller; protocol code may call this.  This
 26  *    must fail if an unrecognized or unsupported mode is requested.
 27  *    It's always safe to call this unless transfers are pending on
 28  *    the device whose settings are being modified.
 29  * @transfer: adds a message to the controller's transfer queue.
 30  * @cleanup: frees controller-specific state
 31  * @can_dma: determine whether this master supports DMA
 32  * @queued: whether this master is providing an internal message queue
 33  * @kworker: thread struct for message pump
 34  * @kworker_task: pointer to task for message pump kworker thread
 35  * @pump_messages: work struct for scheduling work to the message pump
 36  * @queue_lock: spinlock to syncronise access to message queue
 37  * @queue: message queue
 38  * @idling: the device is entering idle state
 39  * @cur_msg: the currently in-flight message
 40  * @cur_msg_prepared: spi_prepare_message was called for the currently
 41  *                    in-flight message
 42  * @cur_msg_mapped: message has been mapped for DMA
 43  * @xfer_completion: used by core transfer_one_message()
 44  * @busy: message pump is busy
 45  * @running: message pump is running
 46  * @rt: whether this queue is set to run as a realtime task
 47  * @auto_runtime_pm: the core should ensure a runtime PM reference is held
 48  *                   while the hardware is prepared, using the parent
 49  *                   device for the spidev
 50  * @max_dma_len: Maximum length of a DMA transfer for the device.
 51  * @prepare_transfer_hardware: a message will soon arrive from the queue
 52  *    so the subsystem requests the driver to prepare the transfer hardware
 53  *    by issuing this call
 54  * @transfer_one_message: the subsystem calls the driver to transfer a single
 55  *    message while queuing transfers that arrive in the meantime. When the
 56  *    driver is finished with this message, it must call
 57  *    spi_finalize_current_message() so the subsystem can issue the next
 58  *    message
 59  * @unprepare_transfer_hardware: there are currently no more messages on the
 60  *    queue so the subsystem notifies the driver that it may relax the
 61  *    hardware by issuing this call
 62  * @set_cs: set the logic level of the chip select line.  May be called
 63  *          from interrupt context.
 64  * @prepare_message: set up the controller to transfer a single message,
 65  *                   for example doing DMA mapping.  Called from threaded
 66  *                   context.
 67  * @transfer_one: transfer a single spi_transfer.
 68  *                  - return 0 if the transfer is finished,
 69  *                  - return 1 if the transfer is still in progress. When
 70  *                    the driver is finished with this transfer it must
 71  *                    call spi_finalize_current_transfer() so the subsystem
 72  *                    can issue the next transfer. Note: transfer_one and
 73  *                    transfer_one_message are mutually exclusive; when both
 74  *                    are set, the generic subsystem does not call your
 75  *                    transfer_one callback.
 76  * @handle_err: the subsystem calls the driver to handle an error that occurs
 77  *        in the generic implementation of transfer_one_message().
 78  * @unprepare_message: undo any work done by prepare_message().
 79  * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
 80  *    number. Any individual value may be -ENOENT for CS lines that
 81  *    are not GPIOs (driven by the SPI controller itself).
 82  * @dma_tx: DMA transmit channel
 83  * @dma_rx: DMA receive channel
 84  * @dummy_rx: dummy receive buffer for full-duplex devices
 85  * @dummy_tx: dummy transmit buffer for full-duplex devices
 86  *
 87  * Each SPI master controller can communicate with one or more @spi_device
 88  * children.  These make a small bus, sharing MOSI, MISO and SCK signals
 89  * but not chip select signals.  Each device may be configured to use a
 90  * different clock rate, since those shared signals are ignored unless
 91  * the chip is selected.
 92  *
 93  * The driver for an SPI controller manages access to those devices through
 94  * a queue of spi_message transactions, copying data between CPU memory and
 95  * an SPI slave device.  For each such message it queues, it calls the
 96  * message's completion function when the transaction completes.
 97  */
 98 struct spi_master {
 99     struct device    dev;
100 
101     struct list_head list;
102 
103     /* other than negative (== assign one dynamically), bus_num is fully
104      * board-specific.  usually that simplifies to being SOC-specific.
105      * example:  one SOC has three SPI controllers, numbered 0..2,
106      * and one board's schematics might show it using SPI-2.  software
107      * would normally use bus_num=2 for that controller.
108      */
109     s16            bus_num;
110 
111     /* chipselects will be integral to many controllers; some others
112      * might use board-specific GPIOs.
113      */
114     u16            num_chipselect;
115 
116     /* some SPI controllers pose alignment requirements on DMAable
117      * buffers; let protocol drivers know about these requirements.
118      */
119     u16            dma_alignment;
120 
121     /* spi_device.mode flags understood by this controller driver */
122     u16            mode_bits;
123 
124     /* bitmask of supported bits_per_word for transfers */
125     u32            bits_per_word_mask;
126 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
127 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
128 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
129 
130     /* limits on transfer speed */
131     u32            min_speed_hz;
132     u32            max_speed_hz;
133 
134     /* other constraints relevant to this driver */
135     u16            flags;
136 #define SPI_MASTER_HALF_DUPLEX    BIT(0)        /* can't do full duplex */
137 #define SPI_MASTER_NO_RX    BIT(1)        /* can't do buffer read */
138 #define SPI_MASTER_NO_TX    BIT(2)        /* can't do buffer write */
139 #define SPI_MASTER_MUST_RX      BIT(3)        /* requires rx */
140 #define SPI_MASTER_MUST_TX      BIT(4)        /* requires tx */
141 
142     /* lock and mutex for SPI bus locking */
143     spinlock_t        bus_lock_spinlock;
144     struct mutex        bus_lock_mutex;
145 
146     /* flag indicating that the SPI bus is locked for exclusive use */
147     bool            bus_lock_flag;
148 
149     /* Setup mode and clock, etc (spi driver may call many times).
150      *
151      * IMPORTANT:  this may be called when transfers to another
152      * device are active.  DO NOT UPDATE SHARED REGISTERS in ways
153      * which could break those transfers.
154      */
155     int            (*setup)(struct spi_device *spi);
156 
157     /* bidirectional bulk transfers
158      *
159      * + The transfer() method may not sleep; its main role is
160      *   just to add the message to the queue.
161      * + For now there's no remove-from-queue operation, or
162      *   any other request management
163      * + To a given spi_device, message queueing is pure fifo
164      *
165      * + The master's main job is to process its message queue,
166      *   selecting a chip then transferring data
167      * + If there are multiple spi_device children, the i/o queue
168      *   arbitration algorithm is unspecified (round robin, fifo,
169      *   priority, reservations, preemption, etc)
170      *
171      * + Chipselect stays active during the entire message
172      *   (unless modified by spi_transfer.cs_change != 0).
173      * + The message transfers use clock and SPI mode parameters
174      *   previously established by setup() for this device
175      */
176     int            (*transfer)(struct spi_device *spi,
177                         struct spi_message *mesg);
178 
179     /* called on release() to free memory provided by spi_master */
180     void            (*cleanup)(struct spi_device *spi);
181 
182     /*
183      * Used to enable core support for DMA handling, if can_dma()
184      * exists and returns true then the transfer will be mapped
185      * prior to transfer_one() being called.  The driver should
186      * not modify or store xfer and dma_tx and dma_rx must be set
187      * while the device is prepared.
188      */
189     bool            (*can_dma)(struct spi_master *master,
190                        struct spi_device *spi,
191                        struct spi_transfer *xfer);
192 
193     /*
194      * These hooks are for drivers that want to use the generic
195      * master transfer queueing mechanism. If these are used, the
196      * transfer() function above must NOT be specified by the driver.
197      * Over time we expect SPI drivers to be phased over to this API.
198      */
199     bool                queued;
200     struct kthread_worker        kworker;
201     struct task_struct        *kworker_task;
202     struct kthread_work        pump_messages;
203     spinlock_t            queue_lock;
204     struct list_head        queue;
205     struct spi_message        *cur_msg;
206     bool                idling;
207     bool                busy;
208     bool                running;
209     bool                rt;
210     bool                auto_runtime_pm;
211     bool                            cur_msg_prepared;
212     bool                cur_msg_mapped;
213     struct completion               xfer_completion;
214     size_t                max_dma_len;
215 
216     int (*prepare_transfer_hardware)(struct spi_master *master);
217     int (*transfer_one_message)(struct spi_master *master,
218                     struct spi_message *mesg);
219     int (*unprepare_transfer_hardware)(struct spi_master *master);
220     int (*prepare_message)(struct spi_master *master,
221                    struct spi_message *message);
222     int (*unprepare_message)(struct spi_master *master,
223                  struct spi_message *message);
224 
225     /*
226      * These hooks are for drivers that use a generic implementation
227      * of transfer_one_message() provied by the core.
228      */
229     void (*set_cs)(struct spi_device *spi, bool enable);
230     int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
231                 struct spi_transfer *transfer);
232     void (*handle_err)(struct spi_master *master,
233                struct spi_message *message);
234 
235     /* gpio chip select */
236     int            *cs_gpios;
237 
238     /* DMA channels for use with core dmaengine helpers */
239     struct dma_chan        *dma_tx;
240     struct dma_chan        *dma_rx;
241 
242     /* dummy data for full duplex devices */
243     void            *dummy_rx;
244     void            *dummy_tx;
245 };

  1 /**
  2  * @file SPI框架.c
  3  * @author your name (you@domain.com)
  4  * @brief SPI设备完整框架
  5  * @version 0.1
  6  * @date 2022-09-24
  7  * 
  8  * @copyright Copyright (c) 2022
  9  * 
 10  */
 11 #include <linux/module.h>
 12 #include <linux/kernel.h>
 13 #include <linux/init.h>
 14 #include <linux/fs.h>
 15 #include <linux/uaccess.h>
 16 #include <linux/io.h>
 17 #include <linux/types.h>
 18 #include <linux/cdev.h>
 19 #include <linux/device.h>
 20 #include <linux/of.h>
 21 #include <linux/of_address.h>
 22 #include <linux/of_irq.h>
 23 #include <linux/gpio.h>
 24 #include <linux/of_gpio.h>
 25 #include <linux/irq.h>
 26 #include <linux/interrupt.h>
 27 #include <linux/input.h>
 28 #include <linux/spi/spi.h>
 29 
 30 
 31 #define ICM20608_CNT            1
 32 #define ICM20608_NAME           "icm20608"
 33 
 34 /*设备结构体*/
 35 struct icm20608_device
 36 {
 37     int major;
 38     int minor;
 39     dev_t dev_id;
 40     struct cdev cdev;
 41     struct class *class;
 42     struct device *device;
 43     int cs_gpio;
 44 
 45     void *private_data;
 46 };
 47 
 48 struct icm20608_device icm20608_dev;
 49 
 50 static int icm20608_open(struct inode *inode, struct file *file)
 51 {
 52     int ret = 0;
 53     return ret;
 54 }
 55 
 56 /*读文件*/
 57 ssize_t icm20608_read(struct file *file, char __user *buf, size_t cnt, loff_t *off)
 58 {
 59     int ret = 0;
 60     return ret;
 61 }
 62 
 63 /*关闭文件*/
 64 static int icm20608_release(struct inode *inode, struct file *file)
 65 {
 66     int ret = 0;
 67     return ret;
 68 }
 69 
 70 /*文件操作集合*/
 71 struct file_operations icm20608_fops = {
 72     .owner = THIS_MODULE,
 73     .open = icm20608_open,
 74     .read = icm20608_read,
 75     .release = icm20608_release,
 76 };
 77 
 78 
 79 /*读多个寄存器*/
 80 static int icm20608_read_regs(struct icm20608_device *dev, u8 reg, u8 *buf, int len)
 81 {
 82     int ret = 0;
 83     return ret;
 84 
 85 }
 86 
 87 /*写多个寄存器*/
 88 static int icm20608_write_regs(struct icm20608_device *dev, u8 reg, u8 *buf,int len)
 89 {
 90     int ret = 0;
 91     return ret;
 92 }
 93 
 94 /*读取单个寄存器*/
 95 static unsigned char icm20608_read_onereg(struct icm20608_device *dev, u8 reg)
 96 {
 97     u8 data = 0;
 98     return data;
 99 }
100 /*写单个寄存器*/
101 static void icm20608_write_onereg(struct icm20608_device *dev, u8 reg, u8 value)
102 {
103 
104 }
105 
106 /*icm20608外设初始化*/
107 void icm20608_device_init(struct icm20608_device *dev)
108 {
109 
110 }
111 
112 
113 static int icm20608_probe(struct spi_device *spi)
114 {   int ret = 0;
115 
116     /*申请字符设备号*/
117     icm20608_dev.major = 0;
118     if(icm20608_dev.major){
119         icm20608_dev.dev_id = MKDEV(icm20608_dev.major,0);
120         ret = register_chrdev_region(icm20608_dev.dev_id,ICM20608_CNT,ICM20608_NAME);
121     }
122     else{
123         ret = alloc_chrdev_region(&icm20608_dev.dev_id,0,ICM20608_CNT,ICM20608_NAME);
124         icm20608_dev.major = MAJOR(icm20608_dev.dev_id);
125         icm20608_dev.minor = MINOR(icm20608_dev.dev_id);
126     }
127 
128     if(ret<0)
129     {
130         printk("icm20608 chrdev_region err\r\n");
131         goto fail_devid;
132     }
133     printk("icm20608 major=%d,minor=%d",icm20608_dev.major,icm20608_dev.minor);
134      
135     /*添加字符设备*/
136     icm20608_dev.cdev.owner = THIS_MODULE;
137     cdev_init(&icm20608_dev.cdev,&icm20608_fops);
138     ret = cdev_add(&icm20608_dev.cdev,icm20608_dev.dev_id,ICM20608_CNT);
139     if(ret<0)
140     {
141         goto fail_cdev;
142     }
143     /*添加类*/
144     icm20608_dev.class = class_create(THIS_MODULE,ICM20608_NAME);
145     if(IS_ERR(icm20608_dev.class))
146     {
147         ret = PTR_ERR(icm20608_dev.class);
148         goto fail_class;
149     }
150 
151     /*添加字符设备*/
152     icm20608_dev.device = device_create(icm20608_dev.class,NULL,
153                                         icm20608_dev.dev_id,NULL,ICM20608_NAME);
154     if(IS_ERR(icm20608_dev.device))
155     {
156         ret = PTR_ERR(icm20608_dev.device);
157         goto fail_device;
158     }
159 
160 
161     /*私有数据设置*/
162     icm20608_dev.private_data = spi;        //spi就是probe函数传进来的spi_device参数
163     return 0;
164 
165 fail_device:
166     class_destroy(icm20608_dev.class);
167 fail_class:
168     cdev_del(&icm20608_dev.cdev);
169 fail_cdev:
170     unregister_chrdev_region(icm20608_dev.dev_id,ICM20608_CNT);
171 fail_devid:
172     return 0;
173 }
174 
175 static int icm20608_remove(struct spi_device *spi)
176 {
177     int ret = 0;
178     /*释放资源*/
179     cdev_del(&icm20608_dev.cdev);
180     unregister_chrdev_region(icm20608_dev.dev_id,ICM20608_CNT);
181     device_destroy(icm20608_dev.class,icm20608_dev.dev_id);
182     class_destroy(icm20608_dev.class);
183     gpio_free(icm20608_dev.cs_gpio);
184     return 0;
185 }
186 
187 static const struct of_device_id icm20608_of_match[] = {
188     {.compatible = "alientek,icm20608"},
189     {}
190 };
191 
192 /*传统匹配*/
193 static const struct spi_device_id icm20608_id[] = {
194     {"alientek,icm20608",0},
195     {}
196 };
197 
198 struct spi_driver icm20608_driver = {
199     .driver = {
200         .name = "icm20608",
201         .owner = THIS_MODULE,
202         .of_match_table = icm20608_of_match,
203     },
204     .probe = icm20608_probe,
205     .remove = icm20608_remove,
206     .id_table = icm20608_id,
207 };
208 
209 
210 static int __init icm20608_init(void)
211 {
212     int ret = 0;
213     ret = spi_register_driver(&icm20608_driver);
214     printk("ret = %d\r\n",ret);
215     return ret;
216 }
217 
218 static void __exit icm20608_exit(void)
219 {
220     spi_unregister_driver(&icm20608_driver);
221 }
222 
223 module_init(icm20608_init);
224 module_exit(icm20608_exit);
225 MODULE_LICENSE("GPL");
226 MODULE_AUTHOR("AC");